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 19-1227; Rev 1; 6/97
KIT ATION EVALU ILABLE AVA
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
____________________________Features
o Better than 1% Output Accuracy Over Line and Load o 90% Efficiency o Excellent Transient Response o Resistor-Programmable Fixed Switching Frequency from 100kHz to 1MHz o Over 35A Output Current o Digitally Programmable Output from 1.1V to 3.5V in 100mV Increments (MAX1624) o Resistor-Adjustable Output down to 1.1V (MAX1625) o Remote Sensing o Adjustable AC Loop Gain (MAX1624) o GlitchCatcherTM Circuit for Fast Load-Transient Response (MAX1624) o Power-Good (PWROK) Output o Current-Mode Feedback o Digital Soft-Start o Strong 2A Gate Drivers o Current-Limited Output
_______________General Description
The MAX1624/MAX1625 are ultra-high-performance, step-down DC-DC controllers for CPU power in high-end computer systems. Designed for demanding applications in which output voltage precision and good transient response are critical for proper operation, they deliver over 35A from 1.1V to 3.5V with 1% total accuracy from a +5V 10% supply. Excellent dynamic response corrects output transients caused by the latest dynamically clocked CPUs. These controllers achieve over 90% efficiency by using synchronous rectification. Flying-capacitor bootstrap circuitry drives inexpensive, external N-channel MOSFETs. The switching frequency is resistor programmable from 100kHz to 1MHz. High switching frequencies allow the use of a small surface-mount inductor and decrease output filter capacitor requirements, reducing board area and system cost. The MAX1624 is available in a 24-pin SSOP and offers additional features such as a digitally programmable output in 100mV increments; adjustable transient response; selectable 0.5%, 1%, or 2% AC load regulation; and gate drive for a current-boost MOSFET. The MAX1625 is resistor adjustable and comes in a 16-pin narrow SO package. Other features in both controllers include internal digital soft-start, a power-good output, and a 3.5V 1% reference output. For a similar controller compatible with the latest Intel VRM/VID specification, see the MAX1638* data sheet.
MAX1624/MAX1625
__________Typical Operating Circuit
INPUT +5V VCC TO AGND TO VDD VDD CSH
________________________Applications
Pentium ProTM, Pentium IITM, PowerPCTM, AlphaTM, and K6TM Systems Desktop Computers LAN Servers Industrial Computers GTL Bus Termination
MAX1625
CSL BST PWROK DH N OUTPUT 1.1V TO 4.5V N
______________Ordering Information
PART MAX1624EAG MAX1625ESE TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 24 SSOP 16 Narrow SO
FREQ
LX
DL PGND CC2 FB CC1 REF AGND (SIMPLIFIED)
Pin Configurations appear at end of data sheet.
*Future product.
Pentium Pro and Pentium II are trademarks of Intel Corp. PowerPC is a trademark of IBM Corp. Alpha is a trademark of Digital Equipment Corp. K6 is a trademark of Advanced Micro Devices. GlitchCatcher is a trademark of Maxim Integrated Products.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
ABSOLUTE MAXIMUM RATINGS
VDD, VCC, PWROK to AGND ......................................-0.3V to 6V PGND to AGND ..................................................................0.3V CSH, CSL to AGND ....................................-0.3V to (VCC + 0.3V) NDRV, PDRV, DL to PGND.........................-0.3V to (VDD + 0.3V) REF, CC1, CC2, LG, D0-D4, FREQ, FB to AGND................................................-0.3V to (VCC + 0.3V) BST to PGND ............................................................-0.3V to 12V BST to LX ....................................................................-0.3V to 6V DH to LX.............................................(LX - 0.3V) to (BST + 0.3V) Continuous Power Dissipation (TA = 70C) 24 Pin SSOP (derate 8.00mW/C above +70C) ..........640mW 16 Pin Narrow SO (derate 8.70mW/C above 70C).....696mW Operating Temperature Range MAX162_E_ _.......................................................-40C to +85C Storage Temperature Range .............................-65C to +125C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = VCC = D4 = +5V, PGND = AGND = D0-D3 = 0V, RFREQ = 33.3k, TA = 0C to +85C, unless otherwise noted.) PARAMETER Input Voltage Range Input Undervoltage Lockout VCC Supply Current VDD Supply Current Reference Voltage Reference Load Regulation Reference Undervoltage Lockout Reference Short-Circuit Current FB Accuracy FB Set Voltage VCC = VDD VCC rising edge, 1% hysteresis VCC = VDD = 5.5V, FB overdrive = 200mV Operating mode Standby mode CONDITIONS MIN 4.5 4.0 TYP MAX 5.5 4.2 2.5 0.3 0.1 3.465 2.7 0.5 TA = +25C to +85C TA = 0C to +85C TA = +25C to +85C TA = 0C to +85C LG = GND AC Load Regulation (Note 3) CSH - CSL = 0mV to 80mV MAX1624 MAX1625 LG = GND DC Load Regulation (Note 3) CSH - CSL = 0mV to 80mV MAX1624 MAX1625 PWROK Trip Level PWROK Output Voltage Low PWROK Output Current High Switching Frequency Rising FB, 1% hysteresis with respect to VREF Falling FB, 1% hysteresis with respect to VREF ISINK = 2mA, VCC = 4.5V PWROK = 5.5V RFREQ = 20k RFREQ = 33.3k RFREQ = 200k 2 850 540 85 1000 600 100 -7.5 6.5 LG = REF LG = VCC LG = REF LG = VCC 0.5 1 2 1 0.05 0.1 0.2 0.1 -6 8 -4.5 9.5 0.4 1 1150 660 115 % V A kHz kHz % % 3.5 3.535 10 3.0 4.0 1 1.5 1 1.5 UNITS V V mA mA V mV V mA % %
VCC = VDD = 5.5V, FB overdrive = 200mV, operating or standby mode No load 0A < ILOAD < 100A Rising edge, 1% hysteresis VREF = 0V MAX1624, over line and load (Note 1) MAX1625, over line and load (Note 2)
_______________________________________________________________________________________
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VCC = D4 = +5V, PGND = AGND = D0-D3 = 0V, RFREQ = 33.3k, TA = 0C to +85C, unless otherwise noted.) PARAMETER Maximum Duty Cycle LG Input Voltage Logic Input Voltage Low Logic Input Voltage High D0-D4 Input Current LG Input Current CSH, CSL Input Current FB Input Current CC1 Output Resistance CC2 Transconductance CC2 Clamp Voltage CC2 Source/Sink Current DH On-Resistance DL On-Resistance DH, DL Source/Sink Current DH, DL Dead Time PDRV Trip Level NDRV Trip Level PDRV, NDRV Response Time PDRV, NDRV On-Resistance PDRV, NDRV Source/Sink Current PDRV, NDRV Minimum On-Time Current-Limit Trip Voltage Soft-Start Time BST Leakage Current To full current limit BST = 12V, LX = 7V, REF = GND 85 With respect to VREF, FB going low With respect to VREF, FB going high FB overdrive = 5% VDD = 4.5V PDRV = NDRV = 2.5V TA = +25C TA = 0C to +85C TA = +25C TA = 0C to +85C Minimum Maximum 100mV overdrive BST - LX = 4.5V VDD = 4.5V DH = DL = 2.5V 0 -2.75 -3 1.25 1 75 2 0.5 100 100 1536 50 115 5 2 2.4 4 100 0.7 0.7 2 30 -2 -1.25 -1 2.75 3 2 2 MAX1624, CSH = CSL = 1.3V, D0-D3 = 5V, D4 = 0V MAX1625, CSH = CSL = 1.1V FB = 1.1V 10 1 3.0 VCC RFREQ = 20k LG = GND (low) LG = REF (mid) LG = VCC (high) D0-D4; VCC = 5.5V D0-D4; VCC = 4.5V D0-D4 = 0V, 5V 2.0 1 4 50 50 0.1 A k mmho V A A ns % % ns A ns mV 1 / fOSC A 3.3 VCC - 0.2 0.8 V V A A A CONDITIONS MIN 85 TYP 90 0.2 3.7 V MAX UNITS %
MAX1624/MAX1625
_______________________________________________________________________________________
3
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
ELECTRICAL CHARACTERISTICS
(VDD = VCC = D4 = +5V, PGND = AGND = D0-D3= 0V, RFREQ = 33.3k, TA = -40C to +85C, unless otherwise noted.) (Note 4) PARAMETER Input Voltage Range Input Undervoltage Lockout VCC Supply Current VDD Supply Current Reference Voltage FB Accuracy FB Set Voltage PWROK Trip Level VCC = VDD VCC rising edge, 1% hysteresis VCC = VDD = 5.5V, FB overdrive = 200mV Operating mode Standby mode CONDITIONS MIN 4.5 3.9 TYP MAX 5.5 4.3 3 0.4 0.2 3.447 3.5 3.553 2.5 2.5 -8 6 800 510 80 84 -6 8 1000 600 100 90 0.7 0.7 70 100 2 2 130 -4 10 1200 690 120 % mV kHz UNITS V V mA mA mA V % % %
VCC = VDD = 5.5V, FB overdrive = 200mV, operating or standby mode No load MAX1624, over line and load MAX1625 Rising FB, 1% hysteresis with respect to VREF Falling FB, 1% hysteresis with respect to VREF RFREQ = 20k RFREQ = 33.3k RFREQ = 200k RFREQ = 20k BST - LX = 4.5V VDD = 4.5V
Switching Frequency Maximum Duty Cycle DH On-Resistance DL On-Resistance Current-Limit Trip Voltage
Note 1: FB accuracy is 100% tested at FB = 3.5V (code 10000) with VCC = VDD = 4.5V to 5.5V and CSH - CSL = 0mV to 80mV. The other DAC codes are tested at the major transition points with VCC = VDD = 5V and CSH - CSL = 0. FB accuracy at other DAC codes over line and load is guaranteed by design. Note 2: FB set voltage is 100% tested with VCC = VDD = 4.5V to 5.5V and CSH - CSL = 0mV to 80mV. Note 3: AC load regulation sets the AC loop gain, to make tradeoffs between output filter capacitor size and transient response, and has only a slight effect on DC accuracy or DC load-regulation error. Note 4: Specifications from 0C to -40C are not production tested.
4
_______________________________________________________________________________________
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
__________________________________________Typical Operating Characteristics
(TA = +25C, using the MAX1624 evaluation kit, unless otherwise noted.)
MAX1624 LOAD-TRANSIENT RESPONSE (WITHOUT GLITCHCATCHER) (1.1V)
MAX1624/25 TOC03
MAX1624 LOAD-TRANSIENT RESPONSE (WITH GLITCHCATCHER) (1.1V )
MAX1624/25 TOC02
MAX1624 LOAD-TRANSIENT RESPONSE DETAIL (WITH GLITCHCATCHER) (1.1V)
LG = REF A B
MAX1624/25 TOC01
LG = REF A
LG = REF A
B
B
C
C
C
D
10s/div A: VOUT, 50mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 10A, tRISE = tFALL = 100ns
10s/div A: VOUT, 50mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 10A, tRISE = tFALL = 100ns
10s/div A: PDRV, 5V/div B: VOUT, 50mV/div, AC COUPLED C: NDRV, 5V/div D: LOAD CURRENT, 0A TO 10A, tRISE = tFALL = 100ns
MAX1624 LOAD-TRANSIENT RESPONSE (WITHOUT GLITCHCATCHER) (2.5V)
MAX1624/25 TOC18
MAX1624 LOAD-TRANSIENT RESPONSE (WITH GLITCHCATCHER) (2.5V)
MAX1624/25 TOC17
MAX1624 LOAD-TRANSIENT RESPONSE (WITHOUT GLITCHCATCHER) (3.5V)
LG = REF A
MAX1624/25 TOC15
LG = REF A
LG = REF A
B
B
B
C
C
C
10s/div A: VOUT, 50mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 10A, tRISE = tFALL = 100ns
10s/div A: VOUT, 50mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 10A, tRISE = tFALL = 100ns
10s/div A: VOUT, 100mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 11A, tRISE = tFALL = 100ns
_______________________________________________________________________________________
5
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
____________________________Typical Operating Characteristics (continued)
(TA = +25C, using the MAX1624 evaluation kit, unless otherwise noted.)
MAX1624 LOAD-TRANSIENT RESPONSE (WITH GLITCHCATCHER) (3.5V)
MAX1624/25 TOC16
MAX1624 SWITCHING WAVEFORMS
MAX1624/25 TOC10
MAX1624 STARTUP AND STANDBY RESPONSE
MAX1624/25 TOC11
LG = REF A
A
A
B
B
B
C C 0 10s/div A: VOUT, 100mV/div, AC COUPLED B: INDUCTOR CURRENT, 10A/div C: LOAD CURRENT, 0A TO 11A, tRISE = tFALL = 100ns 1s/div VIN = 5V, VOUT = 2.5V, LOAD = 5A A: LX, 5V/div B: VOUT, 20mV/div, AC COUPLED C: INDUCTOR CURRENT, 5A/div C
1ms/div VIN = 5V, VOUT = 2.5V, LOAD = 13.8A A: VOUT, 1V/div B: INDUCTOR CURRENT, 10A/div C: STANDBY, D0-D4
MAX1624 EFFICIENCY vs. OUTPUT CURRENT (VOUT = 1.1V)
MAX1624/25 TOC04
MAX1624 EFFICIENCY vs. OUTPUT CURRENT (VOUT = 2.5V)
MAX1624/25 TOC05
MAX1624 EFFICIENCY vs. OUTPUT CURRENT (VOUT = 3.5V)
90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0
MAX1624/25 TOC06
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 1 OUTPUT CURRENT (A) 10
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 1 OUTPUT CURRENT (A) 10
100
0.1
1 OUTPUT CURRENT (A)
10
6
_______________________________________________________________________________________
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
____________________________Typical Operating Characteristics (continued)
(TA = +25C, using the MAX1624 evaluation kit, unless otherwise noted.)
MAX1624 OUTPUT VOLTAGE vs. OUTPUT CURRENT (VOUT = 1.1V)
MAX1624/25 TOC07
MAX1624 OUTPUT VOLTAGE vs. OUTPUT CURRENT (VOUT = 2.5V)
2.499 2.498 OUTPUT VOLTAGE (V) 2.497 2.496 2.495 2.494 2.493 2.492 LG = VCC LG = REF R9 AND R10 = 4.7 LG = AGND
MAX1624/25 TOC08
MAX1624 OUTPUT VOLTAGE vs. OUTPUT CURRENT (VOUT = 3.5V)
3.498 3.496 OUTPUT VOLTAGE (V) 3.494 3.492 3.490 3.488 3.486 3.484 3.482 3.480 LG = VCC LG = REF R9 AND R10 = 4.7 LG = AGND
MAX1624/25 TOC09
1.1020 1.1018 1.1016 OUTPUT VOLTAGE (V) 1.1014 1.1012 1.1010 1.1008 1.1006 1.1004 1.1002 1.1000 0.01 0.1 1 10 OUTPUT CURRENT (A) R9 AND R10 = 4.7 LG = VCC LG = REF LG = AGND
2.500
3.500
2.491 2.490 0.01 0.1 1 10 OUTPUT CURRENT (A)
0.01
0.1
1
10
OUTPUT CURRENT (A)
REFERENCE VOLTAGE vs. OUTPUT CURRENT
MAX1624/25 TOC12
MAXIMUM DUTY CYCLE vs. SWITCHING FREQUENCY
MAX1624/25 tTOC13
MAX1624 OUTPUT ERROR vs. DAC OUTPUT VOLTAGE SETTING
8 6 OUTPUT ERROR (mV) 4 2 0 -2 -4 -6 -8 -10
MAX1624/25 TOC19
5.094 4.594 REFERENCE VOLTAGE (V) 4.094 3.594 3.094 2.594 2.094 1.594 1.094 0.001 SOURCING CURRENT SINKING CURRENT
100 95 MAXIMUM DUTY CYCLE (%) 90 85 80 75 70 65 60 55 50
10
0.01
0.1
1
10
0
200
400
600
800
1000
1200
1.1
1.7
2.3
2.9
3.5
OUTPUT CURRENT (mA)
SWITCHING FREQUENCY (kHz)
DAC OUTPUT VOLTAGE SETTING (V)
_______________________________________________________________________________________
7
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
______________________________________________________________Pin Description
PIN NAME MAX1624 1 MAX1625 1 BST Boost-Capacitor Bypass for High-Side MOSFET Gate Drive. Connect a 0.1F capacitor and low-leakage Schottky diode as a bootstrapped charge-pump circuit to derive a 5V gate drive from VDD for DH. Open-Drain Logic Output. PWROK is high when the voltage on FB is within +8% and -6% of its setpoint. Current-Sense Amplifier's Inverting Input. Place the current-sense resistor very close to the controller IC, and use a Kelvin connection. Use an RC filter network at CSL (Figure 1). Current-Sense Amplifier's Noninverting Input. Use an RC filter network at CSH (Figure 1). Digital Inputs for Programming the Output Voltage. D0-D4 are logic inputs that set the output to a voltage between 1.1V and 3.5V in 100mV increments. Loop Gain-Control Input. LG is a three-level input that is used to trade off loop gain vs. AC load-regulation and load-transient response. Connect LG to VCC, REF, or AGND for 2%, 1%, or 0.5% AC load-regulation errors, respectively. Analog Supply Input, 5V. Use an RC filter network, as shown in Figure 1. Reference Output, 3.5V. Bypass REF to AGND with 0.1F (min). Sources up to 100A for external loads. Force REF below 2V to turn off the controller. Analog Ground Voltage-Feedback Input. MAX1624: Connect FB to the CPU's remote voltage-sense point. The voltage at this input is regulated to a value determined by D0-D4. MAX1625: Connect a feedback resistor voltage divider close to FB from the output to AGND. FB is regulated to 1.1V. Fast-Loop Compensation Capacitor Input. Connect a ceramic capacitor and resistor in series from CC1 to AGND. See the section Compensating the Feedback Loop. Slow-Loop Compensation Capacitor Input. Connect a ceramic capacitor from CC2 to AGND. See the section Compensating the Feedback Loop. Frequency-Programming Input. Attach a resistor within 0.2 in. (5mm) of FREQ to AGND to set the switching frequency between 100kHz and 1MHz. The FREQ pin is normally 2V DC. Digital Inputs for Programming the Output Voltage GlitchCatcher N-Channel MOSFET Driver Output. NDRV swings between VDD and PGND. GlitchCatcher P-Channel MOSFET Driver Output. PDRV swings between VDD and PGND. 5V Power Input for MOSFET Drivers. Bypass VDD to PGND within 0.2 in. (5mm) of the VDD pin using a 0.1F capacitor and 4.7F capacitor connected in parallel. Low-Side Synchronous Rectifier Gate-Drive Output. DL swings between PGND and VDD. See the section BST High-Side Gate-Driver Supply and MOSFET Drivers. Power Ground Switching Node. Connect LX to the high-side MOSFET source and inductor. High-Side Main MOSFET Switch Gate-Drive Output. DH is a floating driver output that swings from LX to BST, riding on the LX switching-node voltage. See the section BST High-Side Gate-Driver Supply and MOSFET Drivers. FUNCTION
2 3 4 5, 6, 7
2 3 4 --
PWROK CSL CSH D2, D1, D0 LG VCC REF AGND
8 9 10 11
-- 5 6 7
12
8
FB
13 14 15 16, 17 18 19 20 21 22 23 24
9 10 11 -- -- -- 12 13 14 15 16
CC1 CC2 FREQ D4, D3 NDRV PDRV VDD DL PGND LX DH
8
_______________________________________________________________________________________
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
R6 100 C9 0.1F C7 4.7F C5 0.1F C8 4.7F
VIN = 5V C1
C11 4.7nF TO VDD R5 100k PWROK D0 D1 D2 D3 D4 REF R4, 40.1k FOR 500kHz FREQ PGND CC2 CC2 NDRV RC1 CC1 CC1 FB TO AGND C6, 1.0F CERAMIC REF AGND PDRV LG DH R10 (OPTIONAL) N1 CSL R8 39 BST VCC VDD CSH R7 C12 39 4.7nF R1
D2 CMPSH-3
C4 0.1F
P1 R11
MAX1624
L1
LX R9 (OPTIONAL) DL N2
VOUT = 1.1V TO 3.5V LOCAL BYPASSING C2 N3 LOAD
D1 (OPTIONAL)
Figure 1. MAX1624 Standard Application Circuit
_______________________________________________________________________________________
9
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
R6 100 C9 0.1F C7 4.7F C5 0.1F C8 4.7F
VIN = 5V C1
C11 4.7nF VCC VDD CSH C12 4.7nF CSL R5 100k PWROK DH R10 (OPTIONAL) N1 R8 39 BST R7 39 R1
D2 CMPSH-3
TO VDD
C4 0.1F
MAX1625
L1 LX R9 (OPTIONAL) VOUT D1 (OPTIONAL) LOCAL BYPASSING C2 LOAD
R4, 40.1k FOR 500kHz FREQ
DL
N2
PGND CC2 CC2 RC1 CC1 CC1 TO AGND C6, 1.0F CERAMIC R3 100k REF AGND FB
C10 (OPTIONAL)
R2 200k
Figure 2. MAX1625 Standard Application Circuit
10
______________________________________________________________________________________
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
Table 1. Component List for Standard 3.3V Applications by Load Current* (Output Voltage = 3.3V, Frequency = 500kHz)
DESCRIPTION BY LOAD CURRENT COMPONENT 6A Power PC/Pentium/GTL bus termination 100F, 10V Sanyo OS-CON 10SL100M 2 x 220F, 4V Sanyo OS-CON 4SP220M Optional (see text) 680pF ceramic 0.056F ceramic Optional Schottky, Nihon NSQ03A02 Central Semiconductor CMPSH-3 1.5H, 8A Coiltronics UP2-1R5 International Rectifier IRF7413 International Rectifier IRF7413 1000pF ceramic 0.056F ceramic Optional Schottky, Nihon NSQ03A02 Central Semiconductor CMPSH-3 0.5H, 17A Coilcraft DO5022P-501HC International Rectifier IRL3103S, D2PAK International Rectifier IRL3103S, D2PAK International Rectifier IRF7107 12m Dale WSL-2512-R012-F 200k, 1% resistor 100k, 1% resistor 2 x 12m in parallel, Dale WSL-2512-R012-F N/A N/A 500m Dale WSL-2512-R500 1k, 5% resistor 1k, 5% resistor 2 x 12m in parallel Dale WSL-2512-R012-F N/A N/A N/A 1k, 5% resistor 1000pF ceramic 0.056F ceramic Optional Schottky, Nihon NSQ03A02 Central Semiconductor CMPSH-3 0.5H Coiltronics UP4-R47, Coilcraft DO5022P-501HC International Rectifier IRF7413 x2 International Rectifier IRF7413 x2 Pentium Pro 3 x 100F, 10V Sanyo OS-CON 10SL100M 3 x 220F, 4V Sanyo OS-CON 4SP220M 12A 11A (LOW-COST VRM) Pentium Pro 3 x 2700F, 6.3V aluminum electrolytic, Sanyo 6MV2700GX 4 x 2700F, 6.3V aluminum electrolytic, Sanyo 6MV2700GX
Application Equipment
C1 Input Capacitor
C2 Output Capacitor C10 Capacitor CC1 Capacitor CC2 Capacitor D1 Rectifier
D2 Rectifier L1 Inductor N1 High-Side MOSFET N2 Low-Side MOSFET N3/P1 (MAX1624) R1 Resistor R2 Resistor R3 Resistor R11 Resistor (MAX1624) RC1 Resistor
*MAX1624: LG = REF, D4-D0 = 10010.
______________________________________________________________________________________
11
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
Table 2. Component Suppliers
SUPPLIER AVX Central Semiconductor Coilcraft Coiltronics Dale Inductors International Rectifier IRC Matsuo Motorola Murata-Erie Nichicon NIEC Sanyo Siliconix Sprague Sumida *Distributor USA PHONE (803) 946-0690 (516) 435-1110 (847) 639-6400 (561) 241-7876 (605) 668-4131 (310) 322-3331 (512) 992-7900 (714) 969-2491 (602) 303-5454 (814) 237-1431 (847) 843-7500 (805) 867-2555* (619) 661-6835 (408) 988-8000 (603) 224-1961 (847) 956-0666 FACTORY FAX (803) 626-3123 (516) 435-1824 1 (847) 639-1469 (561) 241-9339 (605) 665-1627 (310) 322-3332 (512) 992-3377 (714) 960-6492 (602) 994-6430 (814) 238-0490 (847) 843-2798 [81] 3-3494-7414 [81] 7-2070-1174 (408) 970-3950 (603) 224-1430 [81] 3-3607-5144 0 0 0 0 0 0 1 1 1 1 1 0 -- 1 1 1 0 -- 1 1 1 0 -- 0 1 0 0 -- -- -- 1 1 1 0 0 -- 1 1 0 0 -- 1 1 0 0 -- 1 1 0 0 -- 0 1 0 1 1 0 0 0 0 0 0 0 1
Table 3. MAX1624 Output Voltage Adjustment Settings (Abbreviated)
D4 D3 D2 D1 D0 OUTPUT VOLTAGE (V) 3.5 3.4 Decreases in 100mV increments 2.1 No CPU (OFF) 1.9 1.8 Decreases in 100mV increments 1.2 1.1 1.1 1.1 No CPU (OFF) Intel-compatible codes COMPATIBILITY
Non-Intel compatible codes
See Table 4 for a complete listing.
_____Standard Application Circuits
The predesigned MAX1624/MAX1625 circuits shown in Figures 1 and 2 meet a wide range of applications with output currents up to 12A and higher. Use Table 1 to select components appropriate for the desired output current range, and adapt the evaluation kit PC board layout as necessary. Table 2 lists suggested vendors. These circuits represent a good set of trade-offs between cost, size, and efficiency while staying within the worst-case specification limits for stress-related parameters, such as capacitor ripple current. These MAX1624/MAX1625 circuits were designed for the specified frequencies. Do not change the switching frequency without first recalculating component values--particularly the inductance, output filter capacitance, and RC1 resistance values. Recalculate the voltage-feedback resistor and compensation-capacitor values (CC1 and CC2) as necessary to reconfigure them for different output voltages. Table 3 lists voltage adjustment DAC codes for the MAX1624.
_______________Detailed Description
The MAX1624/MAX1625 are BiCMOS switch-mode, power-supply controllers designed for buck-topology regulators. They are optimized for powering the latest high-performance CPUs--demanding applications where output voltage precision, good transient response, and high efficiency are critical for proper operation. With appropriate external components, the MAX1624/MAX1625 deliver over 15A between 1.1V and 3.5V with 1% accuracy. The MAX1625 offers 1% typical transient-load regulation from a +5V supply, while the MAX1624 offers a selectable transient-load regulation of 0.5%, 1%, or 2%. Remote output sensing ensures voltage precision by eliminating errors caused by PC board trace impedance. These controllers achieve 90% efficiency by using synchronous rectification. A typical application circuit consists of two N-channel MOSFETs, a rectifier, and an LC output filter (Figure 1). At each of the internal oscillator's rising edges, the high-side MOSFET switch (N1) is turned on and allows current to ramp up through the inductor to the output filter capacitor and load, storing energy in a magnetic field. The current is monitored by reading the voltage
12
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
REF REF1 REF2 REF3 REF4
AGND
MAX1624
SLOPE COMPENSATION
VCC
FREQ
OSCILLATOR
RESET REF CONTROL AND DRIVE LOGIC
Q
Q SET CC1 40k CC2 10k
WINDOW REF2 REF REF1 REF3 REF4
5
N
FB
D0-D4
PWROK
PDRV
NDRV
Figure 3. MAX1624 Simplified Block Diagram
across the current-sense resistor (R1). When the inductor current ramps up to the current-sense threshold, the MOSFET turns off and interrupts the flow of current from the supply. This causes the magnetic field in the inductor to collapse, resulting in a voltage surge that forces the rectifier diode (D1) or MOSFET body diode (N2) on and keeps the inductor current flowing in the same amplitude and direction. At this point, the synchronous rectifier MOSFET turns on until the end of the cycle to reduce conduction losses across the rectifier diode. The current through the inductor ramps back down,
transferring the stored energy to the output filter capacitor and load. The output filter capacitor stores energy when inductor current is high and releases it when inductor current is low, smoothing the voltage delivered to the load. The MAX1624/MAX1625 use a current-mode pulsewidth-modulation (PWM) control scheme (Figures 3 and 4). The output voltage is regulated by switching at a constant frequency and then modulating the peak inductor current to change the energy transferred per pulse and to adjust to changes in the load. The output
13
______________________________________________________________________________________
+ + AGND
REF
CSL
CSH LG BST DH
LX
VDD DL PGND
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
REF REF1 REF2
REF
CSL
AGND
CSH
VCC
SLOPE COMPENSATION
BST DH
OSCILLATOR
RESET CONTROL AND DRIVE LOGIC REF SET
Q LX
FREQ
Q
VDD DL PGND
CC1 CC2 40k 10k WINDOW REF2 REF REF1
MAX1625
N
FB
PWROK
Figure 4. MAX1625 Simplified Block Diagram
voltage is the average of the AC voltage at the switching node, which is adjusted and regulated by changing the duty cycle of the MOSFET switches. Slope compensation is necessary to stabilize current-mode feedback controllers with a duty cycle greater than 50%. Maximum duty cycle is greater than 85% (see Typical Operating Characteristics).
PWM Controller Block and Integrator
The heart of the current-mode PWM controller is a multi-input open-loop comparator that sums three signals: the buffered feedback signal, the current-sense
14
signal, and the slope-compensation ramp. This directsumming configuration approaches ideal cycle-bycycle control over the output voltage. The output voltage error signal is generated by an error amplifier that compares the amplified feedback voltage to an internal reference. Each pulse from the oscillator sets the main PWM latch that turns on the high-side switch for a period determined by the duty factor (approximately V OUT / VIN). The current-mode feedback system regulates the peak inductor current as a function of the output voltage
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
error signal. Since average inductor current is nearly the same as peak current (assuming the inductor value is set relatively high to minimize ripple current), the circuit acts as a switch-mode transconductance amplifier. It pushes the second output LC filter pole, normally found in a duty-factor-controlled (voltage-mode) PWM, to a higher frequency. To preserve inner-loop stability and eliminate regenerative inductor current staircasing, a slope-compensation ramp is summed into the main PWM comparator. As the high-side switch turns off, the synchronous rectifier latch is set. The low-side switch turns on 30ns later and stays on until the beginning of the next clock cycle. Under fault conditions where the inductor current exceeds the maximum current-limit threshold, the high-side latch resets, and the high-side switch turns off.
MAX1624/MAX1625
VIN = 5V D2 BST LEVEL TRANSLATOR DH R10 LX VDD CONTROL AND DRIVE LOGIC DL R9 PGND R9 AND R10 ARE OPTIONAL C4
N1
N2
Internal Reference
The internal 3.5V reference (REF) is accurate to 1% from 0C to +85C, making REF useful as a system reference. Bypass REF to AGND with a 0.1F (min) ceramic capacitor. A larger value (such as 1F) is recommended for high-current applications. Load regulation is 10mV for loads up to 100A. Loading REF reduces the main output voltage slightly, according to the reference-voltage load-regulation error (see Typical Operating Characteristics). Reference undervoltage lockout is between 2.7V and 3V. Short-circuit current is less than 4mA.
MAX1624 MAX1625
Figure 5. Boost Supply for Gate Drivers
Synchronous-Rectifier Driver
Synchronous rectification reduces conduction losses in the rectifier by shunting the normal Schottky diode or MOSFET body diode with a low-on-resistance MOSFET switch. The synchronous rectifier also ensures proper start-up by precharging the boost-charge pump used for the high-side switch gate-drive circuit. Thus, if you must omit the synchronous power MOSFET for cost or other reasons, replace it with a small-signal MOSFET, such as a 2N7002. The DL drive waveform is simply the complement of the DH high-side drive waveform (with typical controlled dead time of 30ns to prevent cross-conduction or shoot-through). The DL output's on-resistance is 0.7 (typ) and 2 (max).
BST High-Side Gate-Driver Supply and MOSFET Drivers
Gate-drive voltage for the high-side N-channel switch is generated using a flying-capacitor boost circuit (Figure 5). The capacitor is alternately charged from the +5V supply and placed in parallel with the high-side MOSFET's gate and source terminals.
On start-up, the synchronous rectifier (low-side MOSFET) forces LX to 0V and precharges the BST capacitor (C4) to 5V through a diode (D2). This provides the necessary enhancement voltage to turn on the high-side switch. On the next half-cycle, the PWM control logic turns on the high-side MOSFET by closing an internal switch between BST and DH. As the MOSFET turns on, the LX node rises to the input voltage, an action that boosts the 5V gate-drive signal above the +5V supply. DH on-resistance is 0.7 (typical) and 2 (max). Do not bias D2 with voltages greater than 5.5V, as this will destroy the DH gate driver. A 0.1F minimum ceramic capacitor is recommended for the boost supply. Use a low-power, SOT23 Schottky diode to minimize reduction of the gate drive from the diode's forward voltage. Use a low-leakage Schottky diode, such as a CMPSH-3 from Central Semiconductor or a 1N4148, to prevent reverse leakage from discharging the BST capacitor when the ambient temperature is high. Place the BST capacitor and diode within 0.4 in. (10mm) of the BST pin. Gate-drive resistors (R9 and R10) can often be useful to reduce jitter in the switching waveforms by slowing down the fast-slewing LX node and reducing ground bounce at the controller IC. Low-valued resistors from around 1 to 5 are sufficient for many applications.
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15
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
GlitchCatcher Current-Boost Driver (MAX1624)
Drivers for an optional current-boost circuit are included in the MAX1624 to improve transient response. Some dynamically clocked CPUs switch computational blocks on and off as needed to reduce power consumption, and can generate load steps of several amperes in a few tens of nanoseconds. The currentboost circuit is intended to improve transient response to such load steps by bypassing the inductor's lowpass filter operation. When the output drops out of regulation by more than 1.5% to 2.5%, the P-channel or N-channel switches turn on and force the output back into regulation. The MOSFET drivers' response time is typically 75ns, and their minimum on-time is typically 100ns.
R6 100 VIN C1
C9 0.1F
C7 4.7F C11 4.7nF CSH R7 39
VCC C12 4.7nF
MAX1624 MAX1625
CSL
R1
R8 39 N1
Current Sense and Overload Current Limiting
The current-sense circuit resets the main PWM latch and turns off the high-side MOSFET switch whenever the voltage difference between CSH and CSL from current through the sense resistor (R1) exceeds the peak current limit (100mV typical). Current-mode control offers a practical level of overload protection in response to many fault conditions. During normal operation, maximum output current is enforced by the peak current limit. If the output is shorted directly to GND through a low-resistance path, the current-sense comparator may be unable to enforce a current limit. Under such conditions, circuit parasitics such as MOSFET RDS(ON) typically limit the shortcircuit current to a value around the peak-current-limit setting. Attach a lowpass-filter network between the currentsense pins and resistor to reduce high-frequency common-mode noise (Figure 6). The filter should be designed with a time constant of around 200ns. Resistors in the 20 to 100 range are recommended for R7 and R8. Connect the filter capacitors C11 and C12 from VCC to CSH and CSL, respectively. Values of 39 and 4.7nF are suitable for many designs. Place the current-sense filter network close to the IC, within 0.1 in. (2.5mm) of the CSH and CSL pins.
Figure 6. Current-Sense Filter
__________________Design Procedure
Setting the Output Voltage
MAX1624 Select the output voltage using the D0-D4 pins. The MAX1624 uses an internal 5-bit DAC as a feedbackresistor voltage divider. The output voltage can be digitally set in 100mV increments from 1.1V to 3.5V using the D0-D4 inputs (Table 4). D0-D4 are logic inputs and accept both TTL and CMOS voltage levels. The MAX1624 has both FB and AGND inputs, allowing a Kelvin connection for remote voltage and ground sensing to eliminate the effects of trace resistance on the feedback voltage. (See PC Board Layout Considerations for further details.) FB input current is 0.1A (max). The MAX1624 DAC codes were designed for compatibility with Intel specifications for output voltages between 3.5V and 2.1V. Codes 10000 through 11110 are compatible with Intel specifications, while codes 00000 through 01111 are not. Codes 11111 and 01111 turn off the buck controller, placing the IC in a lowcurrent mode (0.2mA typical). For compatibility with Intel codes for output voltages below 2.1V, see the MAX1638/MAX1639 data sheet.
Internal Soft-Start
Soft-start allows a gradual increase of the internal current limit at start-up to reduce input surge currents. In the MAX1624/MAX1625, an internal DAC raises the current-limit threshold from 0V to 100mV in four steps (25mV, 50mV, 75mV, and 100mV) over the span of 1536 oscillator cycles.
16
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
Table 4. Output Voltage-Adjustment Settings
D4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 -- 1 1 D1 D0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 -- 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 -- 0 1 OUTPUT VOLTAGE (V) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 No CPU (off) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.1 1.1 1.1 No CPU (off) AC LOADLG REGULATION CONNECTED ERROR TO (%) VCC REF GND 2 1 0.5 DC LOADREGULATION ERROR (%) 0.2 0.1 0.05 TYPICAL AE (VGAIN/ IGAIN) 2 4 8 Non-Intelcompatible DAC codes Intel-compatible DAC codes COMPATIBILITY
MAX1624/MAX1625
Values under 1k are recommended to improve noise immunity and minimize parasitic capacitance at the FB node. Place R2 and R3 very close to the MAX1625, within 0.2 in. (5mm) of the FB pin.
Selecting the Oscillator Frequency
Set the switching frequency between 100kHz and 1MHz by connecting a resistor from FREQ to AGND. Select the resistor according to the following equation: R4 = 2 x 1010 fOSC
Low-frequency operation reduces controller IC quiescent current and improves efficiency. High-frequency operation reduces cost and PC board area by allowing the use of smaller inductors and fewer and smaller output capacitors. Inductor energy-storage requirements and output capacitor requirements at 1MHz are onethird those at 300kHz.
Choosing the Error-Amplifier Gain (MAX1624)
Set the error-amplifier gain to match the voltage-precision requirements of the CPU used. The MAX1624's loop-gain control input (LG) allows trade-offs in DC/AC voltage accuracy versus output filter capacitor requirements. AC load regulation can be set to 0.5%, 1%, or 2% by connecting LG as shown in Table 5. The MAX1625's default AC regulation is 1%. DC load regulation is typically 10 times better than AC load regulation, and is determined by the gain set by the LG pin.
Table 5. LG Pin Adjustment Settings
MAX1625 Set the output voltage by connecting R2 and R3 (Figure 7) to the FB pin from the output to AGND. R2 is given by the following equation:
V R2 = R 3 x OUT - 1 VFB where VFB = 1.1V. Since the input bias current at FB has a maximum value of 0.1A, values up to 100k can be used for R3 with no significant accuracy loss.
Specifying the Inductor
Three key inductor parameters must be specified: inductance value (L), peak current (IPEAK), and DC resistance (RDC). The following equation includes a constant LIR, which is the ratio of inductor peak-topeak AC current to DC load current. A higher LIR value allows for smaller inductors and better transient response, but results in higher losses and output ripple.
17
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
VOUT FB R2
Calculating the Current-Sense Resistor Value
Calculate the current-sense resistor value according to the worst-case minimum current-limit threshold voltage (from the Electrical Characteristics) and the peak inductor current required to service the maximum load. Use IPEAK from the equation in the section Specifying the Inductor. RSENSE = 85mV IPEAK
MAX1625
AGND
R3
LOAD
PLACE VERY CLOSE TO MAX1625
Figure 7. MAX1625 Adjustable Output Operation
A good compromise between size and loss is a 45% ripple current to load current ratio (LIR = 0.45), which corresponds to a peak inductor current 1.23 times higher than the DC load current. L= VOUT VIN(MAX) - VOUT
The high inductance of standard wire-wound resistors can degrade performance. Low-inductance resistors, such as surface-mount power metal-strip resistors, are preferred. The current-sense resistor's power rating should be higher than the following: RPOWER RATING = (115mV)2 RSENSE
(
)
VIN(MAX) x fOSC x IOUT x LIR
where f is the switching frequency, between 100kHz and 1MHz; IOUT is the maximum DC load current; and LIR is the ratio of AC to DC inductor current (typically 0.45). The exact inductor value is not critical and can be adjusted to make trade-offs among size, transient response, cost, and efficiency. Although lower inductor values minimize size and cost, they also reduce efficiency due to higher peak currents. In general, higher inductor values increase efficiency, but at some point resistive losses due to extra turns of wire exceed the benefit gained from lower AC current levels. Loadtransient response can be adversely affected by high inductor values, especially at low (VIN - VOUT) differentials. The peak inductor current at full load is 1.23 x IOUT if the previous equation is used; otherwise, the peak current can be calculated using the following equation: VOUT VIN(MAX) - VOUT 2fOSC x L x VIN(MAX)
In high-current applications, connect several resistors in parallel as necessary, to obtain the desired resistance and power rating.
Selecting the Output Filter Capacitor
Output filter capacitor values are generally determined by effective series resistance (ESR) and voltage-rating requirements, rather than by the actual capacitance value required for loop stability. Due to the high switching currents and demanding regulation requirements in a typical MAX1624/MAX1625 application, use only specialized low-ESR capacitors intended for switchingregulator applications, such as AVX TPS, Sprague 595D, Sanyo OS-CON, or Nichicon PL series. Do not use standard aluminum-electrolytic capacitors, which can cause high output ripple and instability due to high ESR. The output voltage ripple is usually dominated by the filter capacitor's ESR, and can be approximated as IRIPPLE x RESR. To ensure stability, the capacitor must meet both minimum capacitance and maximum ESR values as given in the following equations: VOUT VREF 1 + VIN(MIN) VOUT x RSENSE x fOSC
IPEAK = IOUT +
(
)
COUT >
The inductor's DC resistance is a key parameter for efficient performance, and should be less than the currentsense resistor value.
RESR < RSENSE
18
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
Compensating the Feedback Loop
The feedback loop needs proper compensation to prevent excessive output ripple and poor efficiency caused by instability. Compensation cancels unwanted poles and zeros in the DC-DC converter's transfer function that are due to the power-switching and filter elements with corresponding zeros and poles in the feedback network. These compensation zeros and poles are set by the compensation components CC1, CC2, and RC1. The objective of compensation is to ensure stability by ensuring that the DC-DC converter's phase shift is less than 180 by a safe margin, at the frequency where the loop gain falls below unity. One simple method for ensuring adequate phase margin is to place pole-zero pairs to approximate a singlepole response with a -20dB/decade slope all the way to unity-gain crossover (Figure 8). (Other compensation schemes are possible.) The order of undesired poles and zeros may differ from that shown in Figure 8, depending on the characteristics of the load, output filter capacitor, switching frequency, and inductor. These procedures are guidelines only, and empirical experimentation is needed to select the compensation components' final values.
Canceling the Sampling Pole and Output Filter ESR Zero Compensate the fast-voltage feedback loop by connecting a resistor and a capacitor in series from the CC1 pin to AGND. The pole from CC1 can be set to cancel the zero from the filter-capacitor ESR. Thus the capacitor at CC1 should be as follows:
COUT x RESR 10k
MAX1624/MAX1625
CC1 =
Resistor RC1 sets a zero that can be used to compensate for the sampling pole generated by the switching frequency. Set RC1 to the following: VOUT 1 + V IN 2fOSC x CC1
RC1 =
The CC1 pin's output resistance is 10k. In the sampling pole equation (Figure 8), DMAX is the maximum duty cycle, or VOUT / VIN(MIN).
LOOP GAIN
1 DOMINANT POLE FROM INTEGRATOR 250k x CC2
GAIN (dB LINEAR)
COMPENSATION ZERO TO CANCEL POLE FROM RLOAD COUT 1mmho 2 x 4CC2
UNWANTED 1 POLE FROM 2R LOAD(MAX) x COUT RLOAD COUT UNWANTED ZERO FROM COUT RESR 1 2RESR x COUT
Setting the Dominant Pole and Canceling the Load and Output Filter Pole Compensate the slow-voltage feedback loop by adding a ceramic capacitor from the CC2 pin to AGND. This is an integrator loop used to cancel out the DC loadregulation error. Selection of capacitor CC2 sets the dominant pole and a compensation zero. The zero is typically used to cancel the unwanted pole generated by the load and output filter capacitor at the maximum load current. Select CC2 to place the zero close to or slightly lower than the frequency of the unwanted pole, as follows:
CC2 = 1mmho x COUT 4 VOUT IOUT(MAX)
1 COMPENSATION POLE TO CANCEL 2(10k x CC1) ZERO FROM COUT RESR
DE
SI
UNWANTED SAMPLING POLE fOSC(MIN)
x
RE
D
RE
(1 + DMAX) x
SP
1 COMPENSATION ZERO TO CANCEL 2(RC1 x CC1) SAMPLING POLE FREQUENCY (LOG)
ON
SE
The transconductance of the integrator amplifier at CC2 is 1mmho. The voltage swing at CC2 is internally clamped around 2.4V to 3V minimum and 4V to VCC maximum to improve transient response times. CC2 can source and sink up to 100A.
Figure 8. MAX1624/MAX1625 Bode Plot with Compensation Poles and Zeros
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19
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
Calculating the Loop Gain (Optional) The loop gain is an important parameter in alternative compensation schemes:
V R Loop Gain (dB) = 20Log AE REF x LOAD x AI VOUT RCS V = 20Log AE REF x 10 85mV
MAX1625
AGND FB R2 R3 OPTIONAL FEEDFORWARD CAPACITOR
OUTPUT
where AE is the error-comparator relative gain, and AI = 10 is the integrator gain. AE is 4 for the MAX1625, but it is 2, 4, or 8 for LG pin settings of VCC, REF, or AGND, respectively, for the MAX1624.
Feed-Forward Compensation (MAX1625) An optional compensation capacitor, typically 220pF, may be needed across the upper feedback resistor to counter the effects of stray capacitance on the FB pin, and to help ensure stable operation when high-value feedback resistors are used (Figure 9). Empirically adjust the feed-forward capacitor as needed.
Figure 9. MAX1625 Optional Feed-Forward Compensation Capacitors
Selecting the Rectifier Diode
The rectifier diode D1 is a clamp that catches the negative inductor swing during the 30ns typical dead time between turning off the high-side MOSFET and turning on the low-side MOSFET synchronous rectifier. D1 must be a Schottky diode, to prevent the MOSFET body diode from conducting. It is acceptable to omit D1 and let the body diode clamp the negative inductor swing, but efficiency will drop 1% or 2% as a result. Use a 1N5819 diode for loads up to 3A, or a 1N5822 for loads up to 10A.
Choosing the MOSFET Switches
The two high-current N-channel MOSFETs must be logic-level types with guaranteed on-resistance specifications at VGS = 4.5V. Lower gate-threshold specs are better (i.e., 2V max rather than 3V max). Gate charge should be less than 100nC to minimize switching losses and reduce power dissipation. I2R losses are the greatest heat contributor to MOSFET power dissipation and are distributed between the highand low-side MOSFETs according to duty factor, as follows: PD (high side) = ILOAD
2
Adding the BST Supply Diode and Capacitor
A signal diode, such as a 1N4148, works well for D2 in most applications, although a low-leakage Schottky diode provides slightly improved efficiency. Do not use large power diodes, such as the 1N4001 or 1N5817. Exercise caution in the selection of Schottky diodes, since some types exhibit high reverse leakage at high operating temperatures. Bypass BST to LX using a 0.1F capacitor.
x RDS(ON) x
VOUT VIN
PD (low side) = ILOAD
2
V x RDS(ON) x 1 - OUT VIN
2
Selecting the Input Capacitors
Place a 0.1F ceramic capacitor and 4.7F capacitor between VCC and AGND, as well as between VDD and PGND, within 0.2 in. (5mm) of the VCC and VDD pins. Select low-ESR input filter capacitors with a ripplecurrent rating exceeding the RMS input ripple current, connecting several capacitors in parallel if necessary. RMS input ripple current is determined by the input voltage and load current, with the worst-possible case occurring at VIN = 2 x VOUT: IRMS = ILOAD(MAX) VOUT (VIN - VOUT ) VIN
PD (low side, shorted) = ILIMIT
x RDS(ON)
where ILIMIT = 115mV / RSENSE . Switching losses affect the upper MOSFET only, and are insignificant at 5V input voltages. Gate-charge losses are dissipated in the IC, and do not heat the MOSFETs. Ensure that both MOSFETs are at a safe junction temperature by calculating the temperature rise according to package thermal-resistance specifications. The high-side MOSFET's worst-case dissipation occurs at the maximum output voltage and minimum input voltage. For the lowside MOSFET, the worst case is at the maximum input voltage when the output is short-circuited (consider the duty factor to be 100%).
20
IRMS = IOUT / 2 when VIN = 2VOUT
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power
Bypassing the Internal Reference
Bypass the internal 3.5V reference at the REF pin by connecting a 0.1F capacitor to AGND. Use a larger value, such as 1F, for high-current applications. It is strongly recommended that the evaluation kit PC board layouts be followed as closely as possible. Contact Maxim's Applications Department concerning the availability of PC board examples for higher-current circuits. In most applications, the circuit is on a multilayer board, and full use of the four or more copper layers is recommended. Use the top layer for high-current power and ground connections. Leave the extra copper on the board as a pseudo-ground plane. Use the bottom layer for quiet connections (REF, FB, AGND), and the inner layers for an uninterrupted ground plane. A ground plane and pseudo-ground plane are essential for reducing ground bounce and switching noise. Follow these steps: 1) Place the high-power components (C1, R1, N1, D1, N2, L1, and C2 in Figure 1) as close together as possible, following these priorities: * Minimize ground-trace lengths in high-current paths. The surface-mount power components should be butted up to one another with their ground terminals almost touching. Connect their ground terminals using a wide, filled zone of toplayer copper (the pseudo-ground plane), rather than through the internal ground plane. At the output terminal, use vias to connect the top-layer pseudo-ground plane to the normal inner-layer ground plane at the output filter capacitor ground terminals. This minimizes interference from IR drops and ground noise, and ensures that the IC's AGND is sensing at the supply's output terminals.
MAX1624/MAX1625
Choosing the GlitchCatcher MOSFETs
P-channel and N-channel switches and a series resistor are required for the current-boost circuit (Figure 10). Current through the MOSFETs and current-limiting resistors must be sufficient to supply the load current, with enough extra for prompt output regulation without excessive overshoot. Design for boost-current values 1.5 times the maximum load current, and choose MOSFETs and current-limiting resistors such that: RDSON,P(MAX) + RLIMIT and RDSON,N(MAX) + RLIMIT VOUT 1.5 IOUT(MAX) VIN - VOUT 1.5 IOUT(MAX)
__________Applications Information
Efficiency Considerations
Refer to the MAX796-MAX799 data sheet for information on calculating losses and improving efficiency.
PC Board Layout Considerations
Good PC board layout and routing are required in highcurrent, high-frequency switching power supplies to achieve good regulation, high efficiency, and stability. The PC board layout artist must be provided with explicit instructions concerning the placement of power-switching components and high-current routing.
INPUT 5V
C1 P1 R11 OUTPUT 1.1V TO 3.5V C2 NDRV N3 LOAD C3
MAX1624
PDRV
Figure 10. GlitchCatcher Circuit
______________________________________________________________________________________ 21
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
* Minimize high-current path trace lengths. Use very short and wide traces. From C1 to N1: 0.4 in. (10mm) max length; D1 cathode to N2: 0.2 in. (5mm) max length; LX node (N1 source, N2 drain, D1 cathode, inductor L1): 0.6 in. (15mm) max length. 2) Place the MAX1624/MAX1625 and supporting components following these rules: * Minimize trace lengths to the current-sense resistor. The IC must be no farther than 0.4 in. (10mm) from the current-sense resistor. Use a Kelvin connection. * Minimize ground trace lengths between the MAX1624/MAX1625 and supporting components. Connect components for the REF, CC1, CC2, and FREQ pin directly to AGND. Connect AGND and PGND at the IC. * Keep noisy nodes and components away from sensitive analog nodes, such as the currentsense, voltage-feedback, REF, CC1, CC2, and FREQ pins. Placing the IC and analog components on the opposite side of the board from the power-switching node is desirable. Noisy nodes include the main switching node (LX), inductor, and gate-drive outputs. * Place components for the FREQ, REF, CC1, and CC2 pins as close to the IC as possible, within 0.2 in. (5mm). * Keep the gate-drive traces (DH, DL, and BST) shorter than 20mm, and route them away from CSH, CSL, REF, FB, etc. * Filter the VCC supply input to the IC. Bypass the IC directly from V DD to PGND using a 0.1F ceramic capacitor and 4.7F electrolytic capacitor placed within 0.2 in. (5mm) of the IC. * Place the voltage-feedback components close to the FB pin of the MAX1625, within 0.2 in. (5mm). Connect the voltage-feedback trace directly to the CPU's power input and route it to avoid noisy traces.
22
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High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
__________________________________________________________Pin Configurations
TOP VIEW
BST 1 PWROK 2 CSL 3 CSH 4 D2 5 D1 6 D0 7 LG 8 VCC 9 REF 10 AGND 11 FB 12
24 DH 23 LX 22 PGND 21 DL BST 1 PWROK 2 CSL 3 CSH 4 VCC 5 REF 6 AGND 7 FB 8 16 DH 15 LX 14 PGND
MAX1624
20 VDD 19 PDRV 18 NDRV 17 D3 16 D4 15 FREQ 14 CC2 13 CC1
MAX1625
13 DL 12 VDD 11 FREQ 10 CC2 9 CC1
SO
SSOP
___________________Chip Information
TRANSISTOR COUNT: 2472 SUBSTRATE CONNECTED TO AGND
______________________________________________________________________________________
23
High-Speed Step-Down Controllers with Synchronous Rectification for CPU Power MAX1624/MAX1625
________________________________________________________Package Information
SSOP.EPS
24
______________________________________________________________________________________


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